Publications with Keyword HIGH SPEED

Siegel, M.*: Transportsysteme für Hochgeschwindigkeitsnetze: Problemanalyse, Lösungsansätze und Entwurf einer exemplarischen Implementierungsstruktur - 55. Bericht über verkehrstheoretische Arbeiten. Dissertation, Universität Stuttgart, E-Technik, IND, 1994. [Show full record] / Download [PDF]

Gremmelmaier, U.*: Methoden zur Planung von hierarchischen Hochgeschwindigkeitsnetzen (MAN) - 64. Bericht über verkehrstheoretische Arbeiten. Dissertation, Universität Stuttgart, E-Technik, 1996. [Show full record] / Download [PDF]

Hauger, S.*; Junghans, S.*; Mutter, A.*; Sass, D.*: A Flexible Microprogrammed Packet Classifier for Edge Nodes of Transport Networks. Beiträge zur 7. ITG-Fachtagung Photonische Netze, Leipzig, April 2006. [Show full record] / Download [PDF]

Hauger, S.*; Junghans, S.*; Köhn, M.*; Sass, D.*: A Scalable Architecture for Flexible High-Speed Packet Classification. Report, IKR, Universität Stuttgart, Stuttgart, Germany, December 2006. [Show full record] / Download [PDF]

Schubert, C.; Derksen, R.H.; Möller, M.; Ludwig, R.; Weiske, C.-J.; Lutz, J.; Ferber, S.; Kirstädter, A.; Lehmann, G.; Schmidt-Langhorst, C.: Integrated 100 Gbit/s ETDM Receiver. IEEE/OSA Journal of Lightwave Technology, Vol. 25, No. 1, January 2007, pp. 122-130. [Show full record] / Download [PDF]

Hauger, S.*; Scharf, M.*; Kögel, J.*; Suriyajan, C.: Quick-Start and XCP on a Network Processor: Implementation Issues and Performance Evaluation. Proceedings of the IEEE International Conference on High Performance Switching and Routing (HPSR 2008), Shanghai, May 2008. [Show full record] / Download [PDF]

Hauger, S.*: A Novel Architecture for a High-Performance Network Processing Unit: Flexibility at Multiple Levels of Abstraction. Proceedings of the IEEE International Conference on High Performance Switching and Routing (HPSR 2009), Paris, June 2009. [Show full record] / Download [PDF]

Hauger, S.*: Designing High-Speed Packet Processing Tasks at Arbitrary Levels of Abstraction - Implementation and Evaluation of a MIXMAP System. Proceedings of the ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS 2009), Princeton, October 2009. [Show full record] / Download [PDF]

Hauger, S.*; Wild, T.; Mutter, A.*; Kirstädter, A.*; Karras, K.; Ohlendorf, R.; Feller, F.*; Scharf, J.*: Packet Processing at 100 Gbps and Beyond - Challenges and Perspectives. Beiträge zur 10. ITG Fachtagung Photonic Networks, Leipzig, May 2009, pp. 43-52. [Show full record] / Download [PDF]

Mutter, A.*: A Novel Hybrid SRAM/DRAM Memory Architecture for Fast Packet Buffers. Proceedings of the ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS 2009), Princeton, October 2009. [Show full record] / Download [PDF]

Teuchert, D.; Hauger, S.*: A Pipelined IP Address Lookup Module for 100 Gbps Line Rates and beyond. Proceedings of the 15th Open European Summer School (EUNICE 2009), Barcelona, September 2009. [Show full record] / Download [PDF]

Mutter, A.*: A Novel Hybrid Memory Architecture with Parallel DRAM for Fast Packet Buffers. Proceedings of the 11th International Conference on High Performance Switching and Routing (HPSR 2010), Dallas, June 2010. [Show full record] / Download [PDF]

Mutter, A.*; Gunreben, S.*; Lautenschläger, W.; Köhn, M.: A Testbed for Validation and Assessment of Frame Switching Networks. Proceedings of the 6th International Conference on Testbeds and Research Infrastructures for the Development of Networks and Communities (TridentCom 2010), Berlin, May 2010. [Show full record] / Download [PDF]

Hauger, S.*: Architektur für flexible Paketverarbeitung in Hochgeschwindigkeitskommunikationsnetzen - Communication Networks and Computer Engineering Report No. 107. Dissertation, Universität Stuttgart, Informatik, Elektrotechnik und Informationstechnik, 2011. [Show full record] / Download [PDF]

Mutter, A.*: A Novel Hybrid Memory Architecture for High-Speed Packet Buffers in Network Nodes - Communication Networks and Computer Engineering Report No. 108. Dissertation, Universität Stuttgart, Informatik, Elektrotechnik und Informationstechnik, 2012. [Show full record] / Download [PDF]

Kühlewind, M.*: Scalable Increase Adaptive Decrease: Congestion Control supporting Low Latency and High Speed - Communication Networks and Computer Engineering Report No. 114. Dissertation, Universität Stuttgart, Informatik, Elektrotechnik und Informationstechnik, 2016. [Show full record] / Download [PDF]