Publications with Keyword HARDWARE

Domschitz, P.*; Schwarz, A.*: Aspekte der Ankopplung von Multimedia-Workstations an das B-ISDN. Beiträge zum GI/ITG Arbeitstreffen Verteilte Multimedia Systeme, Stuttgart, February 1993, pp. 48-57. [Show full record]

Domschitz, P.*; Lemppenau, W.*; Sauer, K.; Schwarz, A.*: Flexible Prototyping the Attachment of Multimedia-Workstations to a B-ISDN Demonstrator. Proceedings of the 6th IEEE Workshop on Local and Metropolitan Area Networks, San Diego, October 1993. [Show full record]

Schwarz, A.*; Domschitz, P.*: Aspects of the Adaptation of Multimedia-Workstations to B-ISDN. Proceedings of the 3rd Joint Workshop on High Speed Networks, Paris, March 1993. [Show full record]

Trefz, M.; Dolzer, K.*: An Experimental On-board Multiservice Switch. Proceedings of the 5th European Conference on Satellite Communications, Toulouse, November 1999. [Show full record] / Download [PDF]

Macian, C.*: The Octopus Network Model: Opening up the Internet to Active and Programmable Network Implementations. Proceedings of the 3rd International Working Conference on Active Networks (IWAN 2001), Philadelphia, September/October 2001. [Show full record] / Download [PDF]

Hauger, S.*; Junghans, S.*; Köhn, M.*; Sass, D.*: A Scalable Architecture for Flexible High-Speed Packet Classification. Report, IKR, Universität Stuttgart, Stuttgart, Germany, December 2006. [Show full record] / Download [PDF]

Meyer, M.*: A True Hardware Read Barrier. Proceedings of the 2006 International Symposium on Memory Management, Ottawa, Ontario, June 2006, pp. 3-16. [Show full record] / Download [PDF]

Sass, D.*; Junghans, S.*: I2MP - An architecture for hardware supported high-precision traffic measurement. Proceedings of the 13th GI/ITG Conference on Measurement, Modeling, and Evaluation of Computer and Communication Systems (MMB 2006), Nuremberg, March 2006. [Show full record] / Download [PDF]

Macian, C.*: Resource Management in Hardware Systems for Programmable Network Nodes - Communication Networks and Computer Engineering Report No. 94. Dissertation, Universität Stuttgart, EI, 2007. [Show full record] / Download [PDF]

Hauger, S.*; Scharf, M.*; Kögel, J.*; Suriyajan, C.: Quick-Start and XCP on a Network Processor: Implementation Issues and Performance Evaluation. Proceedings of the IEEE International Conference on High Performance Switching and Routing (HPSR 2008), Shanghai, May 2008. [Show full record] / Download [PDF]

Horvath, O.*; Meyer, M.*: Fine-Grained Parallel Compacting Garbage Collection through Hardware-Supported Synchronization. 5th International Symposium on Embedded Multicore SoCs, San Diego, 2010. [Show full record] / Download [PDF]

Meyer, M.*: Prozessorarchitektur für exakte Zeigeridentifizierung. Patent, No EP 1 639 475 B1, September 2010. [Show full record]