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Institute of Communication Networks and Computer Engineering (IKR)

Offered Student project topics

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All topics offered in the last few month

In the table below you find a list of all student project topics of the last few months giving an overview of the topics currently actual in the institute. The List of all currently offerend topics is a subset of this complete list.


 Bachelor thesis and research thesis projects 

 Master thesis 

MICROSAR based Interprocess Communication in a Multicore-SoC for the Parallelization of CAN-Tasks
(Master thesis No. 1031)

Implementierung einer RISC-V Erweiterung in VHDL zur Erkennung manipulierter Sprungziele von indirekten Sprungbefehlen für ein prototypisches Rechnersystem
(Master thesis No. 1068)

Adapting and Implementing GradCAM Visualization for ML-based Network Routing
(Master thesis No. 1065)

Designing and Implementing an Automated Hyperparameter Optimization Framework for Network ML Models
(Master thesis No. 1064)

Designing and Implementing Graph Neural Networks for Efficient IP-Optical Networking
(Master thesis No. 1063)

Designing Autoencoder Neural Networks for Efficient IP-Optical Networking
(Master thesis No. 1062)

Design of a Compiler Frontend for GoSUB, an Experimental variant of the Go Programming Language, and Implementation of the Frontend in GoSUB
(Master thesis No. 1058)

Qualitative Exploration and Modelling of IOTA Tangle and its Impact on the Network
(Master thesis No. 1057)

Development and Evaluation of Image-based Train Positioning Algorithms using Cameras in a Test Rig
(Master thesis No. 1056)

Design of a Compiler Frontend for GoSUB, an Experimental variant of the Go Programming Language, and Implementation of the Frontend in GoSUB
(Master thesis No. 1055)

Design and Implementation of an Ethernet Interface for an Experimental Object-Based Computer System
(Master thesis No. 1053)

"Fast Misprediction Recovery" for a Superscalar Object-Based Prozessor in VHDL
(Master thesis No. 1051)

Network Traffic Prediction with Machine Learning using Gaussian Processes
(Master thesis No. 1050)

Design and Implementation of a PCI Express Endpoint for an FPGA in VHDL to attach peripheral components to an Object Based Research Processor.
(Master thesis No. 1049)

Entwurf und Implementierung eines PCIe Transaction Layer Packet Generators mit Hilfe eines AMD FPGA mit integriertem ARM-Prozessor (SoC)
(Master thesis No. 1048)

MICROSAR based Interprocess Communication in a Multicore-SoC for the Parallelization of CAN-Tasks
(Master thesis No. 1031)

Network Pathfinding with Reinforcement Learning
(Master thesis No. 1030)