Publications with Keyword COMPUTER ARCHITECTURE

Sailer, R.*; Federrath, H.; Jerichow, A.; Kesdogan, D.; Pfitzmann, A.: Allokation von Sicherheitsfunktionen in Kommunikationsnetzen. Mehrseitige Sicherheit in der Kommunikationstechnik; Verfahren, Komponenten, Integration, Addison-Wesley, Bonn, D, October 1997, pp. 325-357. [Show full record] / Download [PDF]

Meyer, M.*: An On-Chip Garbage Collection Coprocessor for Embedded Real-Time Systems. Proceedings of the 11th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, Hong Kong, August 2005, pp. 517-524. [Show full record] / Download [PDF]

Stanchina, S.*; Meyer, M.*: Exploiting the Efficiency of Generational Algorithms for Hardware-Supported Real-Time Garbage Collection. Proceedings of the 22nd ACM Symposium on Applied Computing, SAC 2007, Seoul, March 2007. [Show full record] / Download [PDF]

Stanchina, S.*; Meyer, M.*: Mark-Sweep or Copying? A 'Best of Both Worlds' Algorithm and a Hardware-Supported Real-Time Implementation. Proceedings of the 2007 International Symposium on Memory Management, Montreal, October 2007. [Show full record] / Download [PDF]

Meyer, M.*: Prozessorarchitektur für exakte Zeigeridentifizierung. Patent, No EP 1 639 475 B1, September 2010. [Show full record]